Capacitors are a critical electronic device found in large numbers in many everyday products. For example, computers, telecommunications equipment, mobile phones, automobiles, and military equipment each make heavy use of state-of-the-art capacitors. Capacitors that are reliable and inexpensive are thus in great demand.
One conventional structure for ceramic capacitors is a structure of multiple layers in which dielectric layers of ceramic are interleaved with conductive electrodes. Every other conductive electrode is electrically connected, resulting in a device having two effective electrodes with a capacitance many times the capacitance of the single dielectric layer. Such multilayer ceramic capacitors (MLCCs) are the most reliable component for high-energy density storage banks. They also find use in high frequency switch mode power supplies, and account for a large part of the capacitor market, as discussed in T. Nomura et al, “Multilayer Ceramic Capacitors—Recent Trends,” IEEE, Ferroelectrics, 1996, p. 135. One goal of MLCCs is to achieve higher capacitance in combination with a smaller size. The realization of MLCCs with higher capacitance and volumetric efficiencies is today's biggest challenge for MLCC manufacturers. Such MLCCs could be used in the application fields in which electrolytic or plastic film capacitors are currently used.
The main limiting factors for MLCC development are thickness control, the integrity of the dielectric layers and effective electrodes. The primary objectives are smaller case sizes for a given capacitance value, higher reliability and lower cost per unit. The conventional dielectrics that dominate the market are sintering-based NPO, X7R and Z5U. These materials are limited by change in capacitance as a function of temperature and a high rate of aging. Also, large grain size (>3 μm) of the oxide or perovskite powder limits the thickness of the dielectric layer.
In high C-V/Volume capacitors, use of precious metal and the high layer count increase the cost of the capacitors. One objective is to have lower cost per unit.
Lack of availability of high-temperature, high-power capacitors has been one of the weak links in high temperature electronics. The three type (classes) of existing capacitors can operate properly only within the military range of temperature—up to about 150° C. While several manufacturers offer capacitors designed to meet these specifications, only few offer devices that operate beyond that range. As operating temperature increases, the choices and data become progressively limited. The inventors are not aware of any commercial capacitors specified for use above 300° C.
The equations for a planar capacitor are:Capacitance (C)=KA/fd (picofarad) and C/Vol∝Kd−2                 where,        f: conversion factor        (metric system: f=11.31: cm).The energy stored, U, is:   U  =                    CV        2            2        =                            1          2                ⁢                  KA          f                ⁢                              d            ⁡                          (              E              )                                2                ⁢                                  ⁢        V            =              E        ·        d            and the energy density stored, ΔF, in a capacitor (potential energy/volume or mass) is:       Δ    ⁢                  ⁢    F    =            U      Vol        =                            1          2                ⁢                              KE            2                    ⁡                      (            volume            )                              =                        1          2                ⁢                              KE            2                    ρ                ⁢                  (          mass          )                    where K is the relative dielectric constant of the material, A is the effective area of the internal electrode, d is the thickness of the dielectric layer, and E is the electric field. Parametrically, it is desirable to optimize K, A/d and E simultaneously. Practically, it has been easier to attack the problem from two approaches. The first of these is to engineer dielectric films with high K and E. This work extended the energy density of “conventional” capacitors by an order of magnitude, as discussed in M. F. Rose, Transactions of the IEEE on Magnetics, 22, 1986. The current trend is to optimize the A/d ratio in the expression for the capacitance. This will result in high energy density at lower voltage.        
The parameters of interest for such capacitors include:    Capacitance (C).    Temperature coefficient of capacitance (TCC).    Breakdown voltage (BDV).    Capacitance per unit volume or weight (volumetric or weight efficiency).    Dissipation factor (DF) or loss tangent.    Insulation resistance (IR)    For certain applications, radiation immunity.The development of compact and miniature power sources that operate over an extended temperature range becomes possible by replacing existing capacitors with high-temperature capacitors. This development can make possible several new heavy-duty devices in the semiconductor industry, the military (e.g., explosives, fuses, safe-arm-fire devices, and explosive detonators), and space (e.g., compact power supplies, solar-powered equipment). High-temperature capacitors are well suited for pulse power applications such as ignition systems, lasers, x-ray generation, power supplies, electric vehicles, solar-powered equipment and physics research. Applications involving compact power density sources operating in harsh environments and compatible with Micro Electro Mechanical Systems (MEMs) are also possible. Compact power density sources also find use in high frequency switch mode power supplies, because they can be optimized to minimize both effective series resistance (ESR) and effective series inductance (ESL).
A capacitor to be used in a semiconductor memory is disclosed in U.S. Pat. No. 6,144,546. A hexagonal boron nitride as a dielectric is disclosed. The capacitor of the '546 patent includes nanoscale (0.5–5 nm thick) layers of conductors or semiconductors so that two-dimensional electrical conduction occurs along the layers, thereby suppressing leakage current. The dielectric layer is also thin for the low voltage (about 2V) applications anticipated in large-scale integrated circuits.
What is needed is a high-temperature capacitor that can achieve high energy density storage, can operate at relatively high voltage with low current leakage and that can be produced at a reasonable cost.